Posts Tagged ‘unspecified bit rate

Inverse Multiplexing over ATM Overview

Inverse multiplexing (IMA) provides a means of access to ATM networks at rates between DS1/E1 and DS3/E3 levels (1.544 Mbps/2.048 Mbps to 44.736 Mbps/34.368 Mbps) by combining the bandwidth of multiple DS1/E1 links into groups that collectively provide higher intermediate rates. These multiple links are especially desirable in networks where DS3/E3 links are scarce.

IMA breaks up the ATM cell stream and distributes the cells over the multiple physical links of an IMA group (inverse multiplexing) and then recombines the cells into a single stream at the other end of the connection. The ATM cells are distributed in a round-robin fashion over the physical links of the IMA group, demultiplexed at the receiving IMA group, and passed in their original form to the ATM layer (see Figure 1). Using the multiple links of an IMA group increases the logical link bandwidth to approximately the sum of the individual link rates.

 

Figure 1 Inverse Multiplexing and Demultiplexing of ATM Cells Through IMA Groups

Features

The PA-A3-IMA has the following features:

  1. Up to four IMA groups
  2. Eight standard T1/E1 (1.544/2.048 Mbps) interfaces, with two integrated quad RJ-45 connectors
  3. Inverse multiplexing over ATM
  4. Up to 4096 total virtual connections (open VCs)
  5. Mixed mode operation, with some links in User Network Interface (UNI) mode and the others in IMA groups
  6. Maximum differential delay of 250 milliseconds for T1 and 190 milliseconds for E1 between the individual circuits that constitute part of an IMA group
  7. Binary 8-zero substitution (B8ZS) line encoding for T1 and High-Density Bipolar (HDB3) line encoding for E1 in accordance with ATM UNI standards; also alternate mark inversion (AMI) line encoding for both T1 and E1
  8. Super Frame (SF) and Extended Super Frame (ESF) framing for T1; and Basic Frame, Clear E1, and CCS-CRC framing for E1
  9. Header Error Control (HEC)-based cell delineation for ATM framing
  10. Facility Data Link (FDL) processing for T1
  11. Selectable Tx clock sources for T1/E1 lines
  12. Online insertion and removal (OIR)
  13. VP shaping
  14. IP-ATM class of service mapping
  15. These QoS classes are UBR (unspecified bit rate), VBR (variable bit rate), ABR (available bit rate)

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